I've run some data collection using perf stat
set at an interval of 10ms. However, when looking at the output file, it seems like it's close to 10ms between runs but not the same. Is there somewhere in the perfwiki or perf-stat manpages that explains this?
My thought is if it uses interrupts it cannot achieve a perfect interval even with some offset, but I'm not sure. I would like to be able to cite some reason in the official documentation if possible.
I have attached my sample command and some sample output from the perf runs. The discrepancies start small but grows over time since I'm collecting data on long running binaries. $2 is the list of events passed in.
Command: sudo perf kvm --host --guest --guestkallsyms=/tmp/kallsysms --guestmodules=/tmp/modules stat -a -o "perf-stat.out" -e "$2" -I 10 sleep 1000
.
Sample output 1:
# time counts unit events
0.010105854 75,816,307 branch-loads (65.55%)
0.010105854 6,665,278 branch-misses # 9.73% of all branches (65.54%)
0.010105854 68,507,071 branches (95.03%)
0.010105854 7,850,357 branch-load-misses (99.97%)
0.010105854 8,777,217 cache-references
0.010105854 56,341,006 ls_dispatch.store_dispatch (74.06%)
0.020916272 112,106,733 branch-loads
0.020916272 12,542,142 branch-misses # 10.88% of all branches
0.020916272 115,317,475 branches (68.24%)
0.020916272 12,615,815 branch-load-misses (62.95%)
0.020916272 15,555,283 cache-references (69.91%)
0.020916272 79,817,220 ls_dispatch.store_dispatch (98.88%)
0.031640789 113,604,284 branch-loads (62.59%)
0.031640789 12,952,174 branch-misses # 11.29% of all branches (81.41%)
0.031640789 114,720,636 branches (99.37%)
0.031640789 12,952,273 branch-load-misses
0.031640789 15,583,838 cache-references (92.92%)
0.031640789 84,572,328 ls_dispatch.store_dispatch (63.74%)
Sample output 2:
# time counts unit events
0.010073045 127,931,342 ls_dispatch.ld_dispatch (63.79%)
0.010073045 191,430,277 L1-dcache-loads (64.98%)
0.010073045 5,523,387 L1-dcache-load-misses # 2.89% of all L1-dcache accesses (99.70%)
0.010073045 805,856 L1-icache-load-misses
0.010073045 1,185,271 cache-misses
0.010073045 194,303,477 ls_dc_accesses (71.63%)
0.020798715 126,189,500 ls_dispatch.ld_dispatch
0.020798715 191,902,849 L1-dcache-loads (98.73%)
0.020798715 5,564,363 L1-dcache-load-misses # 2.90% of all L1-dcache accesses (62.98%)
0.020798715 821,214 L1-icache-load-misses (62.69%)
0.020798715 1,228,591 cache-misses (75.58%)
0.020798715 191,873,243 ls_dc_accesses
0.031456427 124,588,383 ls_dispatch.ld_dispatch (62.47%)
0.031456427 188,866,685 L1-dcache-loads (88.05%)
0.031456427 5,161,135 L1-dcache-load-misses # 2.73% of all L1-dcache accesses
0.031456427 802,225 L1-icache-load-misses
0.031456427 1,205,606 cache-misses (87.00%)
0.031456427 186,961,816 ls_dc_accesses (62.50%)