I have a question, when I use this code in MPLAB IDE v8.92, Windows 11, when it arrives to the rlf line it behaves weird either if I use 0 or 1 for "d" in rlf. Values for j and k are 0xFF.

As far as I understand when I perfom "rlf f,d" it should roll to the left the bits in "f" setting the carry in the LSB in "f" and then result's destination d when 0 should be set in W reg and when 1 should be set back to "f".

In this case since I'm performing rlf in W and the nature of the sum FF+FF always includes a carry in status' c flag, either using 0 or 1 in rlf should be irrelevant because result should always go to W reg and result should always be 0x01, but when I use 1 in rlf, the W register doesn't change and remains 0x00 and when I use 0 in rlf the W reg does change to 0x01.

What's happening?

This is the code.

   processor 16f877         ;Specify processor 
    include "p16f877.inc"   ;Load processor library

    j equ 0x26              ;Set alias 'j' to address 0x26
    k equ 0x27              ;Set alias 'k' to address 0x27
    c1 equ 0x28             ;Set alias 'c1' to address 0x28
    r1 equ 0x29             ;Set alias 'r1' to address 0x29

     0x00                ;Program vector start
    goto start              ;Go to start flag below

     0x05                ;Move to memory address 0x05 and begin from there

start:  
    movf j,W                ;Moves value of J to W reg, Z flag might be affected
    addwf k,W               ;Adds value in L to W reg
    movwf r1                ;Moves value in W reg to R1
    movlw 0x00
    rlf W,1 ;rlf W,0
    movwf c1
    
    end                     ;End program

And the screenshots: