When I learned about MMIO, I saw different sources, like this (X86 Address Space Controller?), and this video, that said that the thing which "controls" the physical address mappings to the different devices,such as the DRAM controller or PCIE, is a chunk of hardware called "system agent", which generates the transactions and acts as a routing mediator between the CPU and the DRAM controller/PCIe devices/DMI. On the other hand, there are also many people that generally say it is just the memory controller/DRAM controller itself that deals with this routing scheme.

But when digging to the intel manuals, I couldn't find any chunk of hardware in the processor die named "system agent". the only thing I did found in the manual is this thing that seemingly looks like it got 'merged' with the DRAM controller on Bus 0 device 0 called the "host controller", which could be another name for the "system agent", because historically the "host controller" was a different name to the MCH/north bridge chipset of old systems. Up until now, I have not figured out what actually controls the physical address mappings; the system agent or the memory controller itself. Furthermore, if there is a thing called a system agent, you must be able you program it, because the BIOS has to program the memory map.

This question has always struck me because every now and then, when talking about OS/UEFI dev, I hear people say that apart from programming the DRAM controller and the root ports, the BIOS also programs this additional 'hidden' chunk of hardware, that again, many call the system agent, that's deciding whether to route the transactions to the DRAM controller or PCIe.

But when thinking about it more, if there is a programable system agent that is controlling the physical mappings, his presence would be kind of unnecessary because of this possible paradigm;

From a PCIE book, it says: "Once a function’s BARs are programmed, the function knows what address range(s) it owns, which means that function will claim any transactions it sees that is targeting an address range it owns, an address range programmed into one of its BARs. This is good, but it’s important to realize that the only way that function is going to “see” the transactions it should claim is if the bridge(s) upstream of it, forward those transactions downstream to the appropriate link that the target function is connected to".

So the BIOS can just program the DRAM controller, PCI root ports and DMI with type 1 configuration bridges, and they would just claim the transactions and forward it, and then the PCIE functions downstream will just claim the transactions based upon their BAR's. If a "system agent" is involved, what is his purpose if this all routing scheme if all this routing can be done automatically? So apart of not finding this hardware device in the manual, generally when I am trying to think about this logically, this "system agent" chunk of hardware would be kind of unnecessary in terms of controlling routing and physical mappings.

So what really controls the physical address mappings to the different devices? is it the DRAM controller itself or this system agent? What exactly is this 'mysterious' system agent chunk of hardware? is that this "host bridged"? and how can we even program it? I get that some hardware, I guess the system agent, is the thing that generates the PCIE transactions, but what exactly does it have to do with the memory map? Who controls the memory map?