最新消息:雨落星辰是一个专注网站SEO优化、网站SEO诊断、搜索引擎研究、网络营销推广、网站策划运营及站长类的自媒体原创博客

memory - Why does each DRAM chip have to contribute 8 bit to the 64 bit bus width parallely, instead of a single chip contribute

programmeradmin4浏览0评论

Okay my question is probably dumb. But I cant find any answers that correct me.

I learned that in DDR4 -lets say the stick has 8 chips- each chip parallelly contributes 8 bit to the 64 bit bus width.

My question is why? what if I want to get 64 bits that are stored in a single chip. Because with this existing way (that I have explained very poorly and possibly wrong) it will take 8 cycles of data transfer.

Okay my question is probably dumb. But I cant find any answers that correct me.

I learned that in DDR4 -lets say the stick has 8 chips- each chip parallelly contributes 8 bit to the 64 bit bus width.

My question is why? what if I want to get 64 bits that are stored in a single chip. Because with this existing way (that I have explained very poorly and possibly wrong) it will take 8 cycles of data transfer.

Share Improve this question edited Mar 26 at 4:15 Rishi asked Mar 21 at 4:18 RishiRishi 415 bronze badges 3
  • 1 en.wikipedia./wiki/Interleaved_memory – Martheen Commented Mar 21 at 4:22
  • Why do you think it will take 8 cycles? All 8 chips can send their 8 bits at the same time. They all have the same dword address, just different "byte enables". – Tim Roberts Commented Mar 21 at 4:34
  • @TimRoberts No, i was just thinking about a scenario where hypothetically i would want 64 bits that are in the same chip, but thats where interleaved memory comes in, I guess. – Rishi Commented Mar 21 at 5:17
Add a comment  | 

2 Answers 2

Reset to default 1

why

Because it means you get to handle more bits on each cycle. If each chips can process X number of bits each cycle in your hypothetical 8 chips stick, the controller now can process 8X number of bits on each cycle.

what if I want to get 64 bits that are stored in a single chip

You likely won't. Interleaving means every operation is spread evenly among all chips, and since it's supposed to be transparent (ie, the OS and apps generally won't care if a controller have 2 or 4 or 8 chips), you'd go out of your way to write & read something that end up on a single chip, in the process you'd be writing and reading the rest of the chips anyway. A normal operation of storing or reading something will end up using all chips, very quickly, without you having to care about the details.

They're not all 8 bits, you can get them in various widths. Most popular widths would be 4, 8, and 16 bits. I doubt there are any 64-bit chips though, as that would require a lot more pins and possibly a larger package, and there's probably not enough demand for that.

与本文相关的文章

发布评论

评论列表(0)

  1. 暂无评论