I got asked this question in my Computer Organization and Architecture assesment. Can you guys please help me with this?

"A processor is designed to receive a data stream in little endian format and store it at address starting DATA in word order. If the received data is AABBCCDDEE...., show the layout of storage in memory."

I didn't get proper answer for this question, i thought the size of the bit of the computer matters(whether it is 32 or 64 bits). If yes, assume it is 32 bit computer. I am not sure of the answer. I think the answer for this is to write the character in reverse can someone please explain how and why?

I got asked this question in my Computer Organization and Architecture assesment. Can you guys please help me with this?

"A processor is designed to receive a data stream in little endian format and store it at address starting DATA in word order. If the received data is AABBCCDDEE...., show the layout of storage in memory."

I didn't get proper answer for this question, i thought the size of the bit of the computer matters(whether it is 32 or 64 bits). If yes, assume it is 32 bit computer. I am not sure of the answer. I think the answer for this is to write the character in reverse can someone please explain how and why?

• memory
• storage
• data-stream

• This question seems fairly ill-defined, Intel and others call a word 16 bits whereas some specify it as the native data size. Also it mentions it's received in little endian but no indication of the endianess of the processor. – PeterJ Commented yesterday

1 Answer 1

On a little-endian system, the least significant byte goes to the lowest memory address. If you receive a byte stream in little-endian order (e.g., AA BB CC DD EE ...) and store it word by word in a 32-bit processor, you group the bytes in chunks of four. For each 4-byte group (word), the first byte is the least significant byte, so it ends up at the smallest address within that word.

Concretely, for the first word AA BB CC DD:

• AA goes to DATA + 0
• BB goes to DATA + 1
• CC goes to DATA + 2
• DD goes to DATA + 3

So, in the actual byte-by-byte memory dump (from lowest to highest address), you’ll see AA BB CC DD EE FF GG HH ... exactly in the order the bytes arrive. But if you interpret AA BB CC DD as a 32-bit value in little-endian format, it corresponds to the integer 0xDDCCBBAA in typical hex notation (because the “DD” byte is the most significant part of that integer, even though it’s in the highest memory address of the word). That “reverse” effect often confuses people, but it’s really just how little-endian works at the per-word level.